1. Field of the Invention
The present subject matter relates to a circuit and design structure for an input cell for a semiconductor integrated circuit (IC). More specifically, it relates to detecting an unstable input to the integrated circuit.
2. Description of Related Art
Many input/output (I/O) pins of integrated circuits are used for static control signals that are expected to not change their value over time. Examples of such signals include signals that are used during chip initialization but remain static in functional operation and “pervasive” control signals for test modes, clock control, PLL control, driver/receiver inhibits, and the like. Any unexpected value change on these input pins may lead to unexpected and undesired effects. There can be many different reasons for such unwanted glitches such as noise, wire shorts/opens on the printed circuit board, or software/firmware malfunction. The resulting error scenarios from such faults may be complex and may difficult to track back to the root cause.
Many integrated circuits (ICs) use a scan-based design methodology to reduce the cost and increase the coverage of test of the IC. Scan-based techniques can be very useful in determining a root-cause of defect mechanisms. While some ICs may implement a full scan-based design methodology, other designers may choose to implement a boundary scan methodology where the input/output (I/O) cells of an IC are included in a scan chain to allow easy control of IC outputs and easy capture of IC inputs at a system level.